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  fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the to-220 fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. the moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. this isolation is equivalent to using a 100 micron mica barrier with standard to-220 product. the fullpak is mounted to a heatsink using a single clip or by a single screw fixing. s d g parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 12  i d @ t c = 100c continuous drain current, v gs @ 10v 8.5 a i dm pulsed drain current  48 p d @t c = 25c power dissipation 80 w linear derating factor 0.53 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy  130 mj i ar avalanche current  7.2 a e ar repetitive avalanche energy  8.0 mj dv/dt peak diode recovery dv/dt  5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torque, 6-32 or m3 srew 10 lbf?in (1.1n?m) 
    parameter typ. max. units r jc junction-to-case ??? 1.9 r ja junction-to-ambient ??? 65 thermal resistance v dss = 150v r ds(on) = 0.166 ? i d = 12a   advanced process technology  ultra low on-resistance  dynamic dv/dt rating  175c operating temperature  fast switching  fully avalanche rated    2/24/04 www.irf.com 1 to-220 fullp ak c/w   lead-free

2 www.irf.com electrical characteristics @ t j = 25c (unless otherwise specified)   repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 )   starting t j = 25c, l = 4.9mh r g = 25 ? , i as = 7.2a. (see figure 12)  i sd 7.2a, di/dt 100a/s, v dd v (br)dss , t j 175c   pulse width 300s; duty cycle 2%.   caculated continuous current based on maximum allowable junction temperature; for recommended current-handling of the package refer to design tip # 93-4.  uses irl3215 data and test conditions. s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source curr ent integral reverse (body diode)  ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 7.2a, v gs = 0v  t rr reverse recovery time ??? 160 240 ns t j = 25c, i f = 7.2a q rr reverse recoverycharge ??? 810 1210 nc di/dt = 100a/s   t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 12  48  parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 150 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.20 ??? v/c reference to 25c, i d = 1ma  ??? ??? 0.166 v gs = 10v, i d = 7.2a  ??? ??? 0.184 ? v gs = 5.0v, i d = 7.2a  ??? ??? 0.208 v gs = 4.0v, i d = 6a  v gs(th) gate threshold voltage 1.0 ??? 2.0 v v ds = v gs , i d = 250a g fs forward transconductance 8.3 ??? ??? s v ds = 25v, i d = 7.2a  ??? ??? 25 a v ds = 150v, v gs = 0v ??? ??? 250 v ds = 120v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 na v gs = 16v gate-to-source reverse leakage ??? ??? -100 v gs = -16v q g total gate charge ??? ??? 35 i d = 7.2a q gs gate-to-source charge ??? ??? 4.1 nc v ds = 120v q gd gate-to-drain ("miller") charge ??? ??? 21 v gs = 5.0v, see fig. 6 and 13  t d(on) turn-on delay time ??? 7.4 ??? v dd = 75v t r rise time ??? 45 ??? ns i d = 7.2a t d(off) turn-off delay time ??? 38 ??? r g = 12 ?, v gs = 5.0v t f fall time ??? 36 ??? r d = 10.2 ?, see fig. 10   between lead, 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 775 ??? v gs = 0v c oss output capacitance ??? 140 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 70 ??? ? = 1.0mhz, see fig. 5  nh i gss s d g l s internal source inductance ??? 7.5 ??? r ds(on) static drain-to-source on-resistance l d internal drain inductance   4.5  i dss drain-to-source leakage current

www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.01 0.1 1 10 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.5v 0.01 0.1 1 10 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.5v 0.1 1 10 2.0 3.0 4.0 5.0 6.0 7.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 12a vgs top 15v 10v 5v 4.5v 3.5v 3v 2.75v bottom 2.50v vgs top 15v 10v 5v 4.5v 3.5v 3v 2.75v bottom 2.50v

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 0 500 1000 1500 2000 2500 v , drain-to-source voltage (v) c, capacitance (pf) ds v c c c = = = = 0v, c c c f = 1mhz + c + c c shorted gs iss gs gd , ds rss gd oss ds gd c iss c oss c rss 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 0.1 1 10 100 1000 1 10 100 1000 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 0 10 20 30 40 50 0 5 10 15 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 7.2 a v = 30v ds v = 75v ds v = 120v ds

www.irf.com 5 fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms   
 1     0.1 %        
 + -   fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 3 6 9 12 t , case temperature ( c) i , drain current (a) c d

6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -
 fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v 25 50 75 100 125 150 175 0 50 100 150 200 250 300 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 2.9a 5.1a 7.2a

www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets       
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8 www.irf.com data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 02/04 to-220 full-pak package outline dimensions are shown in millimeters (inches) to-220 full-pak part marking information with assembly e xamp l e : t h is is an ir f i840g lot code 3432 as s e mb le d on ww 24 1999 in the ass embly line "k" part number lot code as s e m b l y in t e r n at ional r e ct if ie r logo 34 32 924k ir f i8 40g dat e code ye ar 9 = 1999 we e k 24 line k note: "p" in assembly line position indicates "lead-free"


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